Rate My Professor Jin Liu

Jin Liu is a professor in the Department of Electrical and Computer Engineering within the Engineering faculty at The University of Texas at Dallas. She holds a B.S. degree in Electronics and Information Systems from Zhongshan University in P.R. China in 1992, an M.S. degree in Electrical and Computer Engineering from the University of Houston in 1995, and a Ph.D. degree in Electrical and Computer Engineering from the Georgia Institute of Technology in 1999. After completing her doctorate, she served as an Analog IC Designer at Texas Instruments in 2000. She joined The University of Texas at Dallas as an Assistant Professor in 1999, was promoted to Associate Professor in 2005, and became a full Professor in 2012.

Dr. Jin Liu's research interests lie in analog integrated circuit and systems design for high-speed communications and biomedical applications. Specific areas include high performance ADCs for communications and energy harvesting and low power ICs for IoT devices and biomedical implants. In 2004, she was honored as one of the world's top 12 'New Faces of Engineering' during National Engineers Week, sponsored by the Institute of Electrical and Electronics Engineers and other professional societies. Her influential publications encompass: 'Ground Switching Load Modulation with Ground Isolation Doubler Rectifier for Passive HF RFID Transponders' (IEEE Transactions on VLSI Systems, forthcoming, with Y. Li and H. Lee); 'Study of ADC Resolution and Bandwidth Requirements for High-Speed Data Communications' (Proc. IEEE Mid-west Symposium on Circuits and Systems, 2013, with V. Mukundagiri); 'A 10GS/s 6b Time-Interleaved ADC with Partially Active Flash sub-ADCs' (Proc. IEEE Custom Integrated Circuits Conference, 2013, with X. Yang and R. Payne); 'A 5-GS/s 4-Bit Flash ADC with Triode-Load Bias Voltage Trimming Offset Calibration in 65-nm CMOS' (Proc. IEEE Custom Integrated Circuits Conference, 2011, with J. Yao); 'A 5Gb/s Automatic Within-Pair Skew Compensator for Differential Data in 0.13µm CMOS' (IEEE Transactions on Circuits and Systems I, 2011, with Y. Zheng); 'A 5-MHz 91% Peak Power Efficiency Current-Mode Buck Regulator with Auto-Switchable Peak- and Valley-Current Control' (IEEE Journal of Solid-State Circuits, 2011, with M. Du and H. Lee); and 'An Open-Loop 10GHz 8-Phase Clock Generator in 65nm CMOS' (Proc. IEEE Custom Integrated Circuits Conference, 2011, with X. Yang).