Rate My Professor Santanu Chattopadhyay

Prof. Chattopadhyay's research specializations include VLSI and Embedded Systems, Network-on-Chip Design and Test, Low Power Digital Design and Testing, Thermal Aware Testing, and Logic Encryption. He has authored more than 120 publications on these topics. Notable contributions encompass the book 'Network-on-Chip: The Next Generation of System-on-Chip Integration' co-authored with Santanu Kundu and published by CRC Press in 2018, the journal article 'A survey on application mapping strategies for Network-on-Chip' published in 2013, 'Low power finite state machine synthesis using power-gating' in Integration, the VLSI Journal in 2011, 'In-Field Test for Permanent Faults in FIFO Buffers on NoC Routers' co-authored with Bibhas Ghoshal, Kanchan Manna, and Indranil Sengupta in 2015, and 'Finite State Machine Decomposition for Low Power' in 2006. His work addresses CAD tools for low power circuit design and test, System-on-Chip testing, and Network-on-Chip design and test. Prof. Chattopadhyay has guided doctoral students and developed online courses through NPTEL, including Digital Circuits and Digital VLSI Testing.