Efficient ML Model Design and Optimisation for Resource-Constrained Edge Devices (Ref: CO/PT-SF2/2026)

About the Project

Edge AI promises to bring intelligent decision-making directly to the devices where data is generated, from smart cameras and industrial sensors to wearable health monitors. However, a fundamental challenge remains: the state-of-the-art machine learning models that achieve remarkable accuracy are often too large, power-hungry, and computationally expensive to run on resource-constrained edge hardware. Simply deploying a cloud-sized model on an edge device is not feasible.

This project delves into the exciting and critical domain of Edge Machine Learning (ML) optimisation. It focuses on bridging the gap between complex ML models and the practical limitations of edge computing platforms. The research will explore the entire lifecycle of creating efficient models, from initial design to final deployment on target hardware like NVIDIA Jetson Nano/Xavier NX or specialised Neural Processing Units (NPUs). The ultimate goal is to enable sophisticated AI to run effectively at the edge, balancing performance with the tight constraints of power, memory, and processing capabilities.

This PhD offers an opportunity to work at the intersection of machine learning, computer architecture, and embedded systems, potentially designing novel model architectures that are co-developed with the underlying hardware in mind.

Research Aims and Objectives

The primary goal of this PhD is to develop and evaluate advanced techniques for optimising and deploying ML models on resource-constrained edge devices.

Key objectives include:

• Characterise Edge Constraints: Systematically analyse and benchmark the performance bottlenecks (e.g., memory bandwidth, power consumption, latency) of deploying various ML models on different edge hardware platforms.
• Explore Optimisation Techniques: Investigate and apply state-of-the-art model compression and optimisation techniques, such as quantization, pruning, knowledge distillation, and neural architecture search (NAS), to understand their trade-offs in terms of accuracy, speed, and energy usage.
• Hardware-Aware Model Design: Investigate the potential for designing novel, efficient ML model architectures that are explicitly tailored to the architectural features of specific edge processors (e.g., NPUs, GPUs with Tensor Cores).
• Develop an Optimisation Framework: Create a semi-automated workflow or framework to streamline the process of adapting and deploying a given ML model onto a target edge device, optimising for a user-defined objective (e.g., lowest latency or minimum power).
• Validation and Demonstration: Validate the research by deploying an optimised model for a real-world edge application (e.g., real-time object detection, keyword spotting) and demonstrating superior performance against non-optimised baselines.

We are seeking a highly motivated and hands-on candidate with a passion for making machine learning work in the real world.

Name of primary supervisor/CDT lead:

Professor Posco Tso (p.tso@lboro.ac.uk)

Entry requirements:

A first-class or high 2:1 degree in Computer Science, Electrical Engineering, or a related discipline, in addition to the university's entry requirements.

English language requirements:

Applicants must meet the minimum English language requirements.

Bench fees required: No

Closing date of advert: 30th June 2026

Start date: July 2025, January 2026, April 2026, October 2026

Full-time/part-time availability: Full-time 3 years

Fee band: UK £5,006, International £28,600

How to apply:

All applications should be made online. Under programme name, select Computer Science. Please quote the advertised reference number: CO/PTSF2/2026 in your application.