High-lifespan many-core devices

Switching activity and other technology-related parameters have a significant effect on circuit aging and can therefore affect the lifespan of devices. While in conventional circuits switching activity is directly correlated to performance, the regular structure of many-core devices (based on homogeneous two-dimensional arrays of computing nodes) allows the computational load to be managed in order to extend the lifespan of the circuit without compromising performance.

In this project, you will investigate mapping- and run-time techniques designed to minimise the impact of aging on many-core devices. This will involve implementing techniques for fault and defect tolerance, along with power and frequency management approaches. Adaptive search algorithms will be explored and applied to both simulation and FPGAs hardware platforms to validate the effectiveness of the approach.

Based at UoY.

How to Apply:

Applicants should apply via the University’s online application system at https://www.york.ac.uk/study/postgraduate-research/apply/. Please read the application guidance first so that you understand the various steps in the application process.

Candidates should have (or expect to obtain) a minimum of a UK upper second class honours degree (2.1) or equivalent in Electronic and Electrical Engineering, Computer Science, or a closely related subject.