Technical Specialist at National University of Singapore

Q: What does a Technical Specialist at NUS Enterprise actually do?

You will own the end-to-end pilot-line process architecture for emerging semiconductor platforms (e.g., CMOS+III-V/GaN bonded substrates). Core duties include hands-on wafer bonding process development , MOCVD epitaxy , defining critical-to-quality parameters and SPC monitors , qualifying process equipment, coordinating with external foundries and epi suppliers, and leading a multi-disciplinary engineering team. The goal is to turn lab prototypes into a repeatable, high-yield pilot line that can ship industry-grade sample lots. This is a staff/administration role specifically within university administration jobs , blending deep technical work with project delivery.

Q: What qualifications are essential for this semiconductor role?

You need proven experience in semiconductor process development, integration, or pilot-line scale-up . Must have hands-on expertise in wafer bonding , III-V/GaN epitaxial growth , and supporting unit processes like CMP , thermal processing, and metallization. A strong background in yield engineering, SPC, root-cause analysis , and producing industry-grade process documentation is essential. Experience leading or mentoring engineering teams is required, as is the ability to operate in a fast-paced pilot environment. When applying, ensure your CV highlights these keywords; consult our guide on how to write a winning academic CV for tips.

Q: Is this a permanent or contract position?

The Technical Specialist role is a 2-year contract position, as stated in the job description. It is tied to the ramp-up of a pilot line within NUS Enterprise's ETP Administration. While the contract is fixed-term, the project aims to create a sustainable pilot production capability. For more on different types of university employment contracts , visit our job types guide.

Q: Where is the job located and what is the working environment?

The position is based at the Kent Ridge Campus of the National University of Singapore , within NUS Enterprise. The campus is a major hub for engineering and research. You will work in a pilot-line setting with evolving processes, tight timelines, and cross-functional dependencies. The role involves hands-on lab/fab work as well as external supplier and foundry coordination. Explore other university jobs in Singapore to compare locations and opportunities.

Q: How do I apply and what is the selection process?

You must apply exclusively through the provided Workable link – applications submitted via any other channel will not be processed. The selection will be based on your demonstrated experience in semiconductor process scale-up, as detailed in the qualifications. A strong application will clearly map your background to the core responsibilities (wafer bonding, epitaxy, yield engineering, documentation) . For general advice on preparing a standout application in higher education, read our guide to academic CVs .

Please apply here for this position. (Only applications submitted through this link will be processed.)

Role Intent

Take a lab/prototype semiconductor process (wafer bonding + photonic materials + fab module integration) and turn it into a repeatable, high-yield, well-documented pilot line process that can ship industry-grade sample lots with credible specs, traceability, and supply-chain stability. In short: from "it works" to "it ships."

Core Responsibilities

A. Define the pilot-line process architecture & roadmap

Own the end-to-end process flow definition for the targeted platform (e.g., CMOS+ll1-V / CMOS+GaN, CMOS+ TFLN bonded substrates, on-insulator stacks), including module boundaries, critical interfaces, and maturity roadmap to pilot scale.

B. Develop, optimise, and lock process recipes for scale

Lead hands-on process development and optimisation across the critical modules, including (as applicable to the project):
Wafer bonding process development (bond interface quality, dielectric thickness tuning, densification windows, yield ramp)
MOCVD epitaxy development for 111-V / GaN on Si (uniformity, defect control, repeatability on 200 mm)
Supporting unit processes: CMP, thermal processes/furnace steps, metallization readiness, coating/clean modules, and integration constraints for downstream foundry re-entry

C. Yield engineering, process control, and pilot stability

Implement the pilot-ready quality backbone:
Define critical-to-quality (CTQ) parameters and establish SPC/PC monitors
Drive root-cause analysis for excursions and systematic defects
Own yield ramp plans and sustainment (targeting consistently high bonding and epi outcomes)

D. Equipment & metrology strategy (selection → qualification → uptime)

Select, qualify, and operationalize toolsets required for pilot production, including tool acceptance criteria, recipe portability, and preventive maintenance routines.

E. External foundry and supplier coordination

Act as the technical owner interfacing with:
External foundries for wafer processing/ re-entry flows and back-end integration
Epi/material suppliers and local/global supply chain stabilization (qualification plans, incoming specs, performance scorecards)

F. Documentation & "transfer package" for industry sampling

Produce the full pilot-line transfer kit:
Process flows, BOMs, specs, recipes, control plans, FMEAs
Lot genealogy + traceability structure
Industry sampling documentation (sample CoC/CoA expectations, reliability test hooks, measurement definitions)

G. Team leadership & execution cadence

Lead a multi-disciplinary engineering team spanning process, integration, metrology, and equipment functions. Establish effective execution cadence and drive structured troubleshooting to deliver stable pilot outcomes.

Qualifications

Proven experience in semiconductor process development, integration, or pilot-line scale-up
Hands-on expertise in wafer bonding, epitaxial growth (111-V and/or GaN), and supporting unit processes such as CMP, thermal processing, and metallization readiness
Experience defining end-to-end process flows and transitioning technologies from lab or prototype stage to pilot production
Strong background in yield engineering, SPC, process control, and root-cause analysis
Experience selecting, qualifying, and sustaining semiconductor process equipment and metrology tools
Experience producing comprehensive process documentation and transfer packages suitable for industry-grade sampling
Prior experience leading or mentoring multi-disciplinary engineering teams
Ability to operate effectively in a pilot environment with evolving processes, tight timelines, and cross-functional dependencies

Please be informed that only shortlisted candidates will be notified.

More Information

Job Type: 2-year Contract
Location: Kent Ridge Campus
Organization: NUS Enterprise
Department: ETP - Administration
Job requisition ID: 33993

Job details

Title: Technical Specialist
Employer: National University of Singapore
Location: Kent Ridge Campus
Published: Aug 11, 2026
Closes:: Oct 10, 2026
Job type: Contractor, Staff / Administration
Field: Laboratory and Research

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Frequently Asked Questions

⚙️What does a Technical Specialist at NUS Enterprise actually do?

You will own the end-to-end pilot-line process architecture for emerging semiconductor platforms (e.g., CMOS+III-V/GaN bonded substrates). Core duties include hands-on wafer bonding process development, MOCVD epitaxy, defining critical-to-quality parameters and SPC monitors, qualifying process equipment, coordinating with external foundries and epi suppliers, and leading a multi-disciplinary engineering team. The goal is to turn lab prototypes into a repeatable, high-yield pilot line that can ship industry-grade sample lots. This is a staff/administration role specifically within university administration jobs, blending deep technical work with project delivery.

🎓What qualifications are essential for this semiconductor role?

You need proven experience in semiconductor process development, integration, or pilot-line scale-up. Must have hands-on expertise in wafer bonding, III-V/GaN epitaxial growth, and supporting unit processes like CMP, thermal processing, and metallization. A strong background in yield engineering, SPC, root-cause analysis, and producing industry-grade process documentation is essential. Experience leading or mentoring engineering teams is required, as is the ability to operate in a fast-paced pilot environment. When applying, ensure your CV highlights these keywords; consult our guide on how to write a winning academic CV for tips.

📝Is this a permanent or contract position?

The Technical Specialist role is a 2-year contract position, as stated in the job description. It is tied to the ramp-up of a pilot line within NUS Enterprise's ETP Administration. While the contract is fixed-term, the project aims to create a sustainable pilot production capability. For more on different types of university employment contracts, visit our job types guide.

📍Where is the job located and what is the working environment?

The position is based at the Kent Ridge Campus of the National University of Singapore, within NUS Enterprise. The campus is a major hub for engineering and research. You will work in a pilot-line setting with evolving processes, tight timelines, and cross-functional dependencies. The role involves hands-on lab/fab work as well as external supplier and foundry coordination. Explore other university jobs in Singapore to compare locations and opportunities.

✉️How do I apply and what is the selection process?

You must apply exclusively through the provided Workable link – applications submitted via any other channel will not be processed. The selection will be based on your demonstrated experience in semiconductor process scale-up, as detailed in the qualifications. A strong application will clearly map your background to the core responsibilities (wafer bonding, epitaxy, yield engineering, documentation). For general advice on preparing a standout application in higher education, read our guide to academic CVs.