NEXCOM Project
Future 6G networks will profoundly transform distributed computing systems by tightly integrating communication and computation capabilities. Next-generation wireless links will offer configurable communication parameters (throughput, latency, energy consumption, reliability, etc.), enabling joint optimization of distributed embedded computing systems.
Within this context, IETR, Université de Rennes and INSA Rennes are offering a two-year postdoctoral position dedicated to the identification of parametric wireless communication technologies for the design of distributed multiprocessor systems.
Objectives of the post-doc
The overall objective of this postdoctoral project is to develop Design Space Exploration (DSE) methodologies for distributed multiprocessor architectures integrating parametric wireless communication capabilities, with a particular focus on future 6G wireless networks. The research will develop design tools able to jointly optimize computation and communication parameters while satisfying latency, throughput, energy consumption, functional and environmental constraints.
Task 1 – Design Space Exploration Framework
This task aims at developing design tools adapted to the architectures investigated within the project.
The work will include:
- extending architecture models commonly used in dataflow-based frameworks, such as PREESM (developed at IETR)[1,2], by introducing tunable parameters on communication links;
- developing a Design Space Exploration methodology for distributed computing systems integrating parametric wireless communications;
- optimizing architectures with respect to latency, throughput, power consumption, functional and environmental constraints;
- evaluating the impact of the communication functionalities developed within the project on overall system performance;
- generating Pareto-optimal distributed architectures composed of multiple processing nodes interconnected through optimized wireless communication links.
Task 2 – Proof of Concept Demonstration
A Proof of Concept (PoC) will be developed to demonstrate the benefits of adaptive wireless communication parameter selection in terms of processing speed, throughput, and energy efficiency.
This work directly builds upon Task 1 and the outcomes of WP1, which establishes the theoretical foundations for integrated distributed computing over future wireless networks through:
- multi-user computation models;
- communication-computation co-design;
- function computation-oriented architectures;
- representative use cases, simulation environments and evaluation metrics.
Two experimental scenarios will be investigated using two communicating computing platforms.
Scenario 1: a first platform performs light processing (e.g., AI pre-processing), followed by the transmission of a large amount of data over a high-data-rate wireless link to a second platform performing the remaining computations.
Scenario 2: a first platform performs significant local processing, thereby considerably reducing the communication data rate before transmitting intermediate results to a second platform completing the computation.
Both scenarios will be compared in terms of latency and energy consumption. The underlying objective is to identify the most efficient way of distributing the computing load between distant processing elements while meeting specific constraints.
Existing experimental platforms available at IETR will be reused to implement and validate both scenarios.
Details of the position
Location: this position will take place at IETR laboratory (UMR 6164 CNRS) on the Beaulieu campus of the University of Rennes, France. The candidate will join the ASIC and VAADER teams. Salary around 2400€ net per month depending on background.
Applicant Profile
- PhD Degree in electronics, electrical engineering or computer sciences
- Background in multiprocessor architecture, embedded systems, distributed computing, C/C++, signal processing
- Experience in dataflow modelling, design space exploration
- Design and programming of software-defined radio systems (GNU Radio)
How to apply: Send a resume and a cover letter at jordane.lorandel@univ-rennes.fr, Christophe.moy@univ-rennes.fr, Jean-Francois.Nezan@insa-rennes.fr and mickael.dardaillon@insa-rennes.fr
Bibliography
[1] Maxime Pelcat. Models of Architecture for DSP Systems. Springer. Handbook of Signal Processing Systems, Third Edition, In press. ⟨hal-01660620⟩
[2] Pelcat, Maxime; Desnos, Karol; Heulot, Julien; Guy, Clément; Nezan, Jean-François; Aridhi Slaheddine (2014) “PREESM: A Dataflow-Based Rapid Prototyping Framework for Simplifying Multicore DSP Programming”. EDERC 2014, Milan, Italy.