Rate My Professor Reza Raeisi

Dr. Raeisi's academic interests and research specializations encompass embedded systems, VLSI testing, design-for-testability, and VLSI design verification and testing. He contributes to departmental research projects, including those in semiconductors and ASICs. His publications include 'A Study of Emerging Memory Technology in Hybrid Architectural Approaches of GPGPU' (2017), 'Empirical Learning of Digital Systems Testing and Testable Design Using Industry-Verified Electronics Design Automation Tools in Classroom' (2017), and co-authored works recognized in Fresno State's outstanding faculty publications, such as contributions to IEEE Transactions on Computers. Dr. Raeisi has advanced engineering pedagogy through papers on using tablet PCs to enhance student performance in introductory digital systems courses and integrating industry EDA tools for testable design education. He developed a case study on engineering ethics in a technology startup for Fresno State's Ethics Center. Additionally, he served as Program Chair for the ASEE Pacific Southwest Section in 2011 and is a Johanson Fellow. Dr. Raeisi collaborates on funded projects, including those supported by the Fresno State Transportation Institute involving wireless interconnects and neural network accelerators.