Offer Description
Applications are invited for a temporary post of a Senior RF/mmWave IC Design Engineer within UCD School of Electrical and Electronic Engineering.
This technical leadership role exists to direct the engineering execution, layout synthesis, and final top-level integration of a sub-THz transceiver SoC. Operating within UCD's deep-tech commercialization framework, the appointee translates project milestones into scalable silicon architectures. The position serves as a principal coordinator across cross-functional RF, analog, digital, and test teams, ensuring technical synchronization and design integrity.
Reporting to the Principal Investigator, the appointee maintains primary technical accountability for block-level circuit delivery, floorplanning, and layout supervision. Key responsibilities include establishing sign-off methodologies and defining comprehensive post-silicon validation frameworks to deliver tape-out-ready components optimized to anchor an early-stage deep-tech startup venture.
The mmWave TRx project, funded under an Enterprise Ireland Commercialisation Fund programme, is focused on the development of a highly integrated sub-THz transceiver SoC for next-generation communication and sensing applications. The project combines cutting-edge RFIC design, antenna integration, and silicon validation, with the definitive objective of creating robust technology suitable for a future venture-backed spin-out company.
Salary Range: €65,000 - €80,000 Per Annum
Appointment on the above range will be dependent upon qualifications and experience.
Closing date: 12:00 noon (local Irish time) on 02 September 2026.
Applications must be submitted by the closing date and time specified. Any applications which are still in progress at the closing time of 12:00 noon (Local Irish Time) on the specified closing date will be cancelled automatically by the system. UCD are unable to accept late applications.
UCD do not require assistance from Recruitment Agencies. Any CV's submitted by Recruitment Agencies will be returned.
Prior to application, further information (including application procedure) should be obtained from the Work at UCD website: https://www.ucd.ie/workatucd/jobs/
Where to apply
Website: https://www.aplitrak.com/?adid=eWFzZW1pbi5vemRlbWlyLjk3NTMxLjk5MDhAdW5pY2R1Ymxpbi5hcGxpdHJhay5jb20
Requirements
Research Field: Engineering
Education Level: PhD or equivalent
Research Field: Engineering
Education Level: Master Degree or equivalent
Skills/Qualifications
RF, mmWave, sub-THz IC Design, Custom RF, Analog Layout, Parasitic Extraction, Electromagnetic (EM) Modeling, Passive Structure Optimization, CMOS, FinFET, SOI, FD-SOI process nodes, Advanced physical verification and silicon bring-up infrastructure
Additional Information
Eligibility criteria
Mandatory:
- PhD or MSc in RF / Microwave / mmWave IC Design, Microelectronics, or a related technical engineering discipline.
- 5-10+ years of hands-on industrial or advanced research experience in RF/Analog/Mixed-Signal IC design.
- Lead RF/mmWave transceiver architecture development and block-level specification definitions.
- Design and optimize high-frequency transmitter and receiver building blocks including Power Amplifiers (PAs), Low Noise Amplifiers (LNAs), Mixers, and Frequency Generation/LO distribution.
- Execute EM-aware passive design, modeling, and layout optimization.
- Drive full-custom layout implementation, managing parasitic effects, EM coupling, device matching, and reliability.
- Perform robust post-layout simulations and PVT/corners verification; lead tape-out preparation and sign-off flows.
- Define silicon characterization methodologies and support lab validation and measurement correlation.
- Perform strong and consistent team leadership and mentoring of engineers as required.
- Demonstrate excellent written and verbal English language skills, with the ability to prepare professional project reports as required and other technical documentation.
- Demonstrate how you can positively contribute to fostering an inclusive environment and a high level of awareness of the equality, diversity, and inclusion agenda.
Desirable:
- Experience operating above 100 GHz (sub-THz design domain).
- Experience with digitally-assisted RF calibration and process variation compensation techniques.
- Familiarity with array / beamforming architectures.
- A proven tape-out history with a successful track record of deep-micron silicon realization.
- Deep engineering expertise in full-custom RF/analog IC design, layout implementation, and physical verification.
- Strong understanding of high-frequency design challenges: device matching, symmetry, parasitics (R, C, coupling), EM/IR, and antenna effects.
- Knowledge and hands-on experience with advanced packaging techniques for high-speed/mmWave IC designs (e.g., flip-chip, wafer-level packaging, antenna-on-package integration).
- Deep expertise in performance-critical full-custom layout and advanced physical verification suites (Calibre, Assura, PVS, or Pegasus).
- Experience with deep sub-micron CMOS and FD-SOI platforms (e.g., GlobalFoundries FD-SOI).
Selection process
https://www.ucd.ie/workatucd/jobs/
Website for additional job details: https://www.ucd.ie/
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